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TP-LINK TL-WDR5620 V4.0 (Chinese Market) DD-WRT Support?

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zarkmughal
DD-WRT Novice

Joined: 05 Feb 2023
Posts: 33

Posted: Mon Mar 13, 2023 9:12 Post subject: TP-LINK TL-WDR5620 V4.0 (Chinese Market) DD-WRT Support?
@BrainSlayer @Experts Is it possible to make DD-WRT run on this device? Micro version as it contains 2mb flash stock, but I can easily upgrade ROM IC to 4mb or even 8mb if necessary. Will soon share boot log after UART connection. Last edited by zarkmughal on Mon Mar 13, 2023 9:35; edited 1 time in total

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zarkmughal
DD-WRT Novice

Joined: 05 Feb 2023
Posts: 33

Posted: Mon Mar 13, 2023 9:31 Post subject:
Chips: cFeon QH16B 104HIP Mediatek MT7612 Mediatek MT7628 I just want to run it in 2.4Ghz client mode plus VAP in 5Ghz & 2.4Ghz mode (WISP) I can upgrade to 4mb or even 8mb ROM if required.

blkt
DD-WRT Guru

Joined: 20 Jan 2019
Posts: 5700

Posted: Mon Mar 13, 2023 9:40 Post subject:
2MB seems extremely low, are you sure this does not have 8MB already? https://forum.openwrt.org/t/tl-wdr5620-chinese/39794 https://forum.openwrt.org/t/mercury-mac1200r-v2-installation-howto/2137 Edit: Never mind, V4 appears to be 2MB but V1 is 8MB. https://www.right.com.cn/FORUM/thread-547918-1-1.html https://www.mydigit.cn/thread-37408-1-1.html

zarkmughal
DD-WRT Novice

Joined: 05 Feb 2023
Posts: 33

Posted: Mon Mar 13, 2023 10:33 Post subject:

Code:

[DBG] sel_fine_tmp=00000010, sel_mst_fine=00000009,fg_dly_adj=0000000F
[DBG] sel_fine_tmp=0000000F, sel_mst_fine=00000009,fg_dly_adj=0000000E

[03080C0E][03080C0C][7E7F0000][28253F48][00282549]
DU Setting Cal Done

U-Boot 1.1.3 (Dec 25 2017 - 08:50:47)

Board: Ralink APSoC DRAM: 16 MB
relocate_code Pointer at: 80fc0000
flash manufacture id: 1c, device id 70 15
Warning: un-recognized chip ID, please update bootloader!
PA/LNA:cf,dc
*** Warning - bad CRC, using default environment

icache: sets:512, ways:4, linesz:32 ,total:65536
dcache: sets:256, ways:4, linesz:32 ,total:32768
RESET MT7628 PHY!!!!!!
Please choose the operation or press ctrl + c to stop auto boot:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
9: Load Boot Loader code then write to Flash via TFTP.

You choosed 3
0

3: System Boot system code via Flash.
## Booting image at bc015200 ...
addr:0xbc015200
RALINK_GPIOMODE = 570504c4
RALINK_GPIOMODE = 570404c4
***** Xtal 40MHz *****
start PCIe register access
RALINK_RSTCTRL = 2400000
RALINK_CLKCFG1 = fdbfffc0

*************** MT7628 PCIe RC mode *************
PCIE0 enabled
Port 0 N_FTS = 1b105000
init_rt2880pci done
Scan busNo=0, devNo=0 funNo=0.
PCI-E setup device 0x801, 0x14C3.
PCIe DEV 0x801 VENDOR 0x14C3 isn't work properly.
PCI-E setup bridge done.
**************************************pci_scan_bridge****************************************
bridge configuration invalid ([bus 00-00]), reconfiguring
**************************************pci_scan_bridge****************************************
Scan busNo=1, devNo=0 funNo=0.
PCI-E setup device 0x7662, 0x14C3.
PCIe DEV 0x7662 VENDOR 0x14C3 isn't work properly.
PCIe DEV 0x7662 VENDOR 0x14C3 isn't work properly.
PCIe DEV 0x7662 VENDOR 0x14C3 isn't work properly.
PCIe DEV 0x7662 VENDOR 0x14C3 isn't work properly.
PCI-E setup nprmal device done.
Scan busNo=1, devNo=1 funNo=0.
Scan busNo=0, devNo=1 funNo=0.
BAR0 at slot 0 = 0
bus=0x0, slot = 0x0
res[0]->start = 0
res[0]->end = 7fffffff
res[1]->start = 0
res[1]->end = ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x1, slot = 0x0
res[0]->start = 0
res[0]->end = fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
RALINK_REG_GPIOMODE:0X570404D4
RALINK_REG_GPIOMODE2:0X5550555
Before exit sysClkConnect!
In sysClkEnable!
Before exit sysClkEnable!
Attmacthi7ng6 i2nt8erEfanced lLo0o..a. ddo neu
nitNum=0

Waitting for RX_DMA_BUSY status Start... done

==> netpool_mangement.c
Init netpool for mtk network now
netpool_mangement.c(): malloc for clConfig[0] with size(4748832)!
pNetPool[0]=0x80e77bd0!
<== netpool_mangement.c
Count=1,netpool=80e77bd0

Tx_Ring addr: 0xa099d2e0!!!

Rx_Ring addr: 0xa099c620!!!
mt7628EndLoad unitNum=1

Version2.0
Software Platform for PNE2.2
Copyright(C) 2001-2011 by TP-LINK TECHNOLOGIES CO., LTD.
Creation date: Mar 6 2018, 16:04:22
# RALINK_REG_GPIOMODE2:0X10001
miniFs.c(2387): Install minifs driver successed.
Flash ID = 0x0.
Flash UID 0x53464450100FF109300000FF
set mii port 0 value 0x00003300
add net default: gateway 169.254.148.97
change net 169.254.148.0
change net 0.0.0.0
==> netpool_mangement.c
mtk netPool has been init before
Count=2,netpool=80e77bd0
First phase! the return iniString=rai!
The initString info:
phyNum=0!
devNum=0!
infType=5!
irqNum=25!
devType=0!
privSize=0!
csrAddr=0x7fffffff!
devName=rai!
Update memory base to 80316c2c00000001 from bar: 14
Found PCI-E device(0x14c3:0x7662) 1:0.0
Vendor Id : 0x000014C3
Device Id : 0x00007662
bar 0 : 0x20000004
bar 1 : 0x00000000
map 0 : 0xC0000000
map 1 : 0x00000000
hal_vec = 54, base address = 20000004
pAd->ChipID=76120044
RTMPInitPCIeDevice 1
RTMPInitPCIeDevice 2
RTMPInitPCIeDevice 3
The primary RSNIE: 805c553d, len = 8
0x0000 : 01 00 00 0f ac 02 00 00
The primary RSNIE: 805c553d, len = 20
0x0000 : 01 00 00 0f ac 04 01 00 00 0f ac 04 01 00 00 0f
0x0010 : ac 02 00 00
==> netpool_mangement.c
mtk netPool has been init before
Count=3,netpool=80e77bd0
rai: at CSR addr 0x20000000
../rlt_wifi/os/vxworks/rt_vxworks.c 3241 pAd=80577930availableNum(0) devInitStr =0:5:0:1024:4:0:apclii
wlan is caled
wlan_5G is caled
<<<<<load fw image method 1
<<<<<<<<<<<<< try 1
<<<<<<<<<<<<< OS_LOAD_CODE_FROM_BIN_2G will load file: /fw/mtk/WIFI_RAM_CODE_MT7628_e2.bin
<<<<<<<<<<<<< OS_LOAD_CODE_FROM_BIN_2G load file: /fw/mtk/WIFI_RAM_CODE_MT7628_e2.bin size: 63984(0xf9f0)
FW Version:_e2_mp
FW Build Date:20160524163352
<<<<<<<<<<<<< try 1
<<<<<<<<<<<<< oooooo! will load file: /fw/mtk/mt7662_patch_e3_hdr_v0.0.2_P69.bin
<<<<<<<<<<<<< OS_LOAD_CODE_FROM_BIN load file: /fw/mtk/mt7662_patch_e3_hdr_v0.0.2_P69.bin size: 26350(0x66ee)
<<<<<load rom patch finish 0
<<<<<<<<<<<<< try 1
<<<<<<<<<<<<< oooooo! will load file: /fw/mtk/MT7662_E3_v1.9_20160711.bin
<<<<<<<<<<<<< OS_LOAD_CODE_FROM_BIN load file: /fw/mtk/MT7662_E3_v1.9_20160711.bin size: 81984(0x14040)
wlan_5G is caled
<<<<<load fw image finish 0
wlan_5G is caled
MAX_LEN_CFG =3e3640 2
8067C300: 28 76 06 00 00 0C - 43 E1 76 28 00 00 00 00 (v.... C.v(....
8067C310: 00 00 FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C320: FF FF 00 00 00 00 20 00 - 00 00 00 0C 43 E1 76 29 ...... . ....C.v)
8067C330: 00 0C 43 E1 76 2A 22 34 - 00 20 FF FF 00 01 00 00 ..C.v*"4 . ......
8067C340: 00 00 00 00 22 00 00 00 - 00 00 30 00 00 00 00 00 ...."... ..0.....
8067C350: 00 00 00 00 00 94 40 BA - C0 CC 24 83 84 83 40 CC ......@. ..$...@.
8067C360: 24 84 84 84 00 00 00 00 - 00 00 00 00 00 00 00 00 $....... ........
8067C370: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00 ........ ........
8067C380: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00 ........ ........
8067C390: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00 ........ ........
8067C3A0: 00 00 C2 C2 C2 C2 C2 C0 - C0 C2 00 C2 00 00 82 82 ........ ........
8067C3B0: 00 00 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00 ........ ........
8067C3C0: 00 00 00 00 00 00 00 00 - 00 00 00 1A 22 2A 31 35 ........ ...."*15
8067C3D0: 01 35 39 40 46 4D 7F 7F - 7F 00 00 00 00 00 00 00 .59@.......
8067C3E0: 00 00 11 1D 11 1D 1C 35 - 1C 35 1E 35 1E 35 17 19 .......5 .5.5.5..
8067C3F0: 17 19 02 00 00 00 B0 00 - 80 88 00 00 00 00 00 00 ........ ........
8067C400: 00 00 FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C410: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C420: FF FF 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00 ........ ........
8067C430: 77 00 11 1D 11 1D 15 7F - 15 7F 17 7F 17 7F 10 3B w..... .;
8067C440: 10 3B FF FF FF FF FF FF - FF FF FF FF FF FF FF FF .;...... ........
8067C450: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C460: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C470: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C480: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C490: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C4A0: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C4B0: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C4C0: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C4D0: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C4E0: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C4F0: FF FF FF FF FF FF FF FF - FF FF FF FF FF FF FF FF ........ ........
8067C500: 34 12 00 00 00 00 00 00 - 00 00 00 00 00 00 00 00 4....... ........
WTBL Segment 1 info:
MemBaseAddr/FID:0x28000/0
EntrySize/Cnt:32/128
WTBL Segment 2 info:
MemBaseAddr/FID:0x40000/0
EntrySize/Cnt:64/128
WTBL Segment 3 info:
MemBaseAddr/FID:0x42000/64
EntrySize/Cnt:64/128
WTBL Segment 4 info:
MemBaseAddr/FID:0x44000/128
EntrySize/Cnt:32/128
The primary RSNIE: 8058917a, len = 22
0x0000 : 00 50 f2 01 01 00 00 50 f2 04 01 00 00 50 f2 04
0x0010 : 01 00 00 50 f2 02
The secondary RSNIE: 80589279, len = 20
0x0000 : 01 00 00 0f ac 04 01 00 00 0f ac 04 01 00 00 0f
0x0010 : ac 02 00 00
The primary RSNIE: 8058917a, len = 22
0x0000 : 00 50 f2 01 01 00 00 50 f2 04 01 00 00 50 f2 04
0x0010 : 01 00 00 50 f2 02
The secondary RSNIE: 80589279, len = 20
0x0000 : 01 00 00 0f ac 04 01 00 00 0f ac 04 01 00 00 0f
0x0010 : ac 02 00 00
----------> RE CHIP_CALIBRATION
RF0[0x024c]=0x201d4037
RF0[0x0250]=0x00070f0f
RF0[0x0264]=0x37888000
RF0[0x0278]=0x40101011
RF1[0x024c]=0x201d3c41
RF1[0x0250]=0x00070f11
RF1[0x0264]=0x41888000
RF1[0x0278]=0x3c101011

===============qadInit_2G===============

dale_gribble39
DD-WRT Guru

Joined: 11 Jun 2022
Posts: 1958

Posted: Mon Mar 13, 2023 15:46 Post subject:

MediaTek, 2MB flash. Likelihood of getting supported = 0.
_________________
"The woods are lovely, dark and deep,
But I have promises to keep,
And miles to go before I sleep,
And miles to go before I sleep." - Robert Frost

"I am one of the noticeable ones - notice me" - Dale Frances McKenzie Bozzio

<fact>code knows no gender</fact>

This is me, knowing I've ruffled your feathers, and not giving a ****
Some people are still hard-headed.
--------------------------------------
Mac Pro (Mid 2012) - Two 2.4GHz 6-Core Intel Xeon E5645 processors 64GB 1333MHz DDR3 ECC SDRAM OpenSUSE Leap 15.5

egc
DD-WRT Guru

Joined: 18 Mar 2014
Posts: 12917
Location: Netherlands

Posted: Mon Mar 13, 2023 15:50 Post subject:

Moved to Ralink/Mediatek forum
_________________
Routers:Netgear R7000, R6400v1, R6400v2, EA6900 (XvortexCFE), E2000, E1200v1, WRT54GS v1.
Install guide R6400v2, R6700v3,XR300:https://forum.dd-wrt.com/phpBB2/viewtopic.php?t=316399
Install guide R7800/XR500: https://forum.dd-wrt.com/phpBB2/viewtopic.php?t=320614
Forum Guide Lines (important read):https://forum.dd-wrt.com/phpBB2/viewtopic.php?t=324087

zarkmughal
DD-WRT Novice

Joined: 05 Feb 2023
Posts: 33

Posted: Wed Mar 15, 2023 12:16 Post subject:
So it was a waste of money. I googled its specs online but was not able to find authentic ROM photograph/storage at that time, so bought in hurry from a 2nd hand routers shop, In a hope to find 8mb or atleast 4mb ROM inside, manufacturer should be ashamed of making this cheap junk. BIG BRANDS lol.

blkt
DD-WRT Guru

Joined: 20 Jan 2019
Posts: 5700

Posted: Wed Mar 15, 2023 12:26 Post subject:
From my searching a few days ago only V1 has 8MB, but yes this is totally TP-Link style with the cool sunglasses.

dale_gribble39
DD-WRT Guru

Joined: 11 Jun 2022
Posts: 1958

Posted: Wed Mar 15, 2023 13:40 Post subject:

Doubtful that a micro build could be done unless you use the stock firmware kernel and certain bits. Kernel and driver alone in DD-WRT would limit what packages could be included - even if you could fit it in the limitations of the flash layout, and there would be no dropbear or SSL support, whatsoever. Doing anything with stock TP-Link source trees is ridiculous as well. All you can expect at this point is to use it as a dumb AP. Agreed that this seems to be a typical move by TP-Link, especially for the Chinese market.
_________________
"The woods are lovely, dark and deep,
But I have promises to keep,
And miles to go before I sleep,
And miles to go before I sleep." - Robert Frost

"I am one of the noticeable ones - notice me" - Dale Frances McKenzie Bozzio

<fact>code knows no gender</fact>

This is me, knowing I've ruffled your feathers, and not giving a ****
Some people are still hard-headed.
--------------------------------------
Mac Pro (Mid 2012) - Two 2.4GHz 6-Core Intel Xeon E5645 processors 64GB 1333MHz DDR3 ECC SDRAM OpenSUSE Leap 15.5

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