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WNDR3700v5 Advice Please

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kernel-panic69
DD-WRT Guru

Joined: 08 May 2018
Posts: 16808
Location: Texas, USA

Posted: Mon Jan 05, 2026 17:52 Post subject:

Read through the thread... you linked exactly what build you flashed, and the generic starting point link for downloads was posted at least once.
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se325919
DD-WRT Novice

Joined: 28 Nov 2025
Posts: 19

Posted: Tue Jan 06, 2026 12:28 Post subject:

OK, that was my own stupid fault.

I have downloaded the files again.

First I flashed the webflash bin file via the gargoyle GUI. It warned me this file is not compatible with this model. I'm not sure if that is significant or not as Gargoyle maybe doesn't know how to interpret the dd-wrt file. I chose "force upgrade" anyway and it seemed to flash ok. However it would not boot afterwards. Here are the logs it produces:

Code:

...and so on and so on. There is a line in there which says "Bad magic Number", but not being an expert, I don't know if that is a problem or not.

se325919
DD-WRT Novice

Joined: 28 Nov 2025
Posts: 19

Posted: Tue Jan 06, 2026 12:42 Post subject:

The next step I tried was using the NMRPflash utility to flash the factory to ddwrt img file to the device. This process went smoothly and everything seemed ok, but the device does not boot. Here are the logs after a power cycle:

Code:

===================================================================

      MT7621 stage1 code 13:14:00 (ASIC)

      CPU=50000000 HZ BUS=16666666 HZ

==================================================================

Change MPLL source from XTAL to CR...

do MEMPLL setting..

MEMPLL Config : 0x11100000
3PLL mode + External loopback

=== XTAL-40Mhz === DDR-1200Mhz ===

PLL3 FB_DL: 0xe, 1/0 = 667/357 39000000

PLL4 FB_DL: 0x11, 1/0 = 540/484 45000000

PLL2 FB_DL: 0x14, 1/0 = 723/301 51000000

do DDR setting..[00320000]

Apply DDR3 Setting...(use customer AC)

0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120

--------------------------------------------------------------------------------

0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

000E:| 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1

000F:| 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0

0010:| 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0

0011:| 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0

0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

rank 0 coarse = 15

rank 0 fine = 80

B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0

opt_dle value:9

DRAMC_R0DELDLY[018]=00001E1F

==================================================================

   RX DQS perbit delay software calibration

==================================================================

1.0-15 bit dq delay value

==================================================================

bit| 0 1 2 3 4 5 6 7 8 9

--------------------------------------

0 | 15 9 15 14 15 11 15 9 6 13

10 | 9 15 9 14 8 14

--------------------------------------

==================================================================

2.dqs window

x=pass dqs delay value (min~max)center

y=0-7bit DQ of every group

input delay:DQS0 =31 DQS1 = 30

==================================================================

bit DQS0 bit DQS1

0 (0~58)29 8 (1~56)28

1 (0~56)28 9 (1~56)28

2 (0~58)29 10 (1~57)29

3 (1~60)30 11 (1~55)28

4 (0~61)30 12 (1~58)29

5 (1~61)31 13 (1~56)28

6 (0~59)29 14 (1~58)29

7 (1~62)31 15 (1~59)30

==================================================================

3.dq delay value last

==================================================================

bit| 0 1 2 3 4 5 6 7 8 9

--------------------------------------

0 | 15 12 15 15 15 11 15 9 8 15

10 | 10 15 10 15 9 14

==================================================================

==================================================================

TX perbyte calibration

==================================================================

DQS loop = 15, cmp_err_1 = ffff2a15

DQS loop = 14, cmp_err_1 = ffff0801

DQS loop = 13, cmp_err_1 = ffff0001

dqs_perbyte_dly.last_dqsdly_pass[1]=13, finish count=1

DQS loop = 12, cmp_err_1 = ffff0000

dqs_perbyte_dly.last_dqsdly_pass[0]=12, finish count=2

DQ loop=15, cmp_err_1 = ffff00aa

dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=1

DQ loop=14, cmp_err_1 = ffff0082

DQ loop=13, cmp_err_1 = ffff0000

dqs_perbyte_dly.last_dqdly_pass[0]=13, finish count=2

byte:0, (DQS,DQ)=(8,8)

byte:1, (DQS,DQ)=(8,9)

20,data:88

[EMI] DRAMC calibration passed

===================================================================

      MT7621 stage1 code done

      CPU=50000000 HZ BUS=16666666 HZ

===================================================================

U-Boot 1.1.3 (Nov 17 2014 - 08:29:53)

Board: Ralink APSoC DRAM: 128 MB
relocate_code Pointer at: 87fb4000

Config XHCI 40M PLL
flash manufacture id: c2, device id 20 18
find flash: MX25L12805D
*** Warning - bad CRC, using default environment

============================================
Ralink UBoot Version: 4.2.1.0
--------------------------------------------
ASIC MT7621AS (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: SPI Flash
Date:Nov 17 2014 Time:08:29:53
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768

##### The CPU freq = 880 MHZ ####
estimate memory size =128 Mbytes

Reset switch ...
#Reset_MT7530
set LAN/WAN LLLLW
Example expects ABI version 2
Actual U-Boot ABI version 2

[31m******************************************
Uboot StandAlone Entry
******************************************[0m
0, cmd
1, 0x0000000D
cmd : 0x0000000D

Press Ctrl+C to Enter the Main loop...
Example expects ABI version 2
Actual U-Boot ABI version 2

[31m******************************************
Uboot StandAlone Entry
******************************************[0m
0, cmd
1, 0x0000000F
cmd : 0x0000000F
Enter NMRP_main
Flash Sector Number : 256.

NetTxPacket = 0x87FE4300

KSEG1ADDR(NetTxPacket) = 0xA7FE4300

NetLoop,call eth_halt !

NetLoop,call eth_init !
Trying Eth0 (10/100-M)

Waitting for RX_DMA_BUSY status Start... done

ETH_STATE_ACTIVE!!
NMRP_FLASH_SIZE_buffer --> a1000000.
NMRP:LISTENING
### No NMRP Server found ###
Example expects ABI version 2
Actual U-Boot ABI version 2

[31m******************************************
Uboot StandAlone Entry
******************************************[0m
0, boot
Flash Sector Number : 256.

***************************************************

Sercomm Boot Version 1.13.0

***************************************************

Entering Firmware : Everything is OK.

flash base: 0xbfc00000, kernel addr :0xbfc50000, bootloader size: 0x30000, config size 0x10000, fac size : 0x10000
kernel addr :0xbfc50000

System Boot system code via Flash.
## Booting image at bfc50000 ...
Image Name: DD-WRT v24 Linux Kernel Image
Image Type: MIPS Linux Kernel Image (uncompressed)
Data Size: 2004548 Bytes = 1.9 MB
Load Address: 80001000
Entry Point: 80001000
Verifying Checksum ... OK
OK

commandline in boot is : <NULL> !!!!

No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 128

Starting kernel ...

OpenWrt kernel loader for MIPS based SoC
Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
Decompressing kernel... done!
Starting kernel at 80001000...

[ 0.000000] Linux version 4.14.356-openela-rc1-rt159 (root@linux) (gcc version 13.1.0 (OpenWrt GCC 13.1.0 r22658+9-2c530fcb97)) #6831 SMP Mon Dec 1 05:00:44 +07 2025
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[ 0.000000] bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] MIPS: machine is Netgear WNDR3700V5
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 08000000 @ 00000000 (usable)
[ 0.000000] VPE topology {2} total 2
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] percpu: Embedded 14 pages/cpu s26960 r8192 d22192 u57344
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32512
[ 0.000000] Kernel command line: console=ttyS0,57600 console=ttyS0,57600n8 root=/dev/mtdblock5 rootfstype=squashfs noinitrd
[ 0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Writing ErrCtl register=00007a0f
[ 0.000000] Readback ErrCtl register=00007a0f
[ 0.000000] Memory: 123156K/131072K available (5070K kernel code, 260K rwdata, 800K rodata, 256K init, 196K bss, 7916K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[ 0.000000] NR_IRQS: 256
[ 0.000000] CPU Clock: 880MHz
[ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[ 0.000010] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[ 0.015552] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[ 0.087861] pid_max: default: 32768 minimum: 301
[ 0.097151] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.110167] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.125700] Hierarchical SRCU implementation.
[ 0.134794] smp: Bringing up secondary CPUs ...
[ 6.840998] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 6.841006] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 6.841016] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 6.841160] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.204428] Synchronize counters for CPU 1: done.
[ 0.264089] smp: Brought up 1 node, 2 CPUs
[ 0.275570] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.295021] futex hash table entries: 512 (order: 2, 16384 bytes)
[ 0.307216] pinctrl core: initialized pinctrl subsystem
[ 0.318364] NET: Registered protocol family 16
[ 0.343829] pull PCIe RST: RALINK_RSTCTRL = 0
[ 0.652788] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.662853] ***** Xtal 40MHz *****
[ 0.669585] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.679789] Port 0 N_FTS = 1b102800
[ 0.686686] Port 1 N_FTS = 1b102800
[ 0.693617] Port 2 N_FTS = 1b102800
[ 1.852027] PCIE1 no card, disable it(RST&CLK)
[ 1.860714] -> 12007f2
[ 1.865535] PCIE0 enabled
[ 1.870739] PCIE2 enabled
[ 1.875914] PCI host bridge /pcie@1e140000 ranges:
[ 1.885438] MEM 0x0000000060000000..0x000000006fffffff
[ 1.895805] IO 0x000000001e160000..0x000000001e16ffff
[ 1.906163] PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
[ 1.936580] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 1.947849] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 1.959058] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 1.971237] PCI host bridge to bus 0000:00
[ 1.979248] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[ 1.992928] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff]
[ 2.006556] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[ 2.020029] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[ 2.036613] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 2.052410] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 2.069689] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
[ 2.082715] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
[ 2.096542] pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000]
[ 2.109667] pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000]
[ 2.123490] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[ 2.136971] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
[ 2.151319] pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff]
[ 2.164798] pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
[ 2.178272] pci 0000:00:01.0: BAR 1: assigned [mem 0x60310000-0x6031ffff]
[ 2.191760] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
[ 2.206277] pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref]
[ 2.220600] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 2.230442] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
[ 2.243934] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref]
[ 2.258280] pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff]
[ 2.271757] pci 0000:00:01.0: PCI bridge to [bus 02]
[ 2.281587] pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff]
[ 2.296652] clocksource: Switched to clocksource GIC
[ 2.308031] NET: Registered protocol family 2
[ 2.316936] IP idents hash table entries: 2048 (order: 2, 16384 bytes)
[ 2.330460] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[ 2.344189] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
[ 2.356810] TCP: Hash tables configured (established 1024 bind 1024)
[ 2.369530] UDP hash table entries: 256 (order: 1, 8192 bytes)
[ 2.381022] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[ 2.393680] NET: Registered protocol family 1
[ 2.636602] 4 CPUs re-calibrate udelay(lpj = 2924544)
[ 2.648360] workingset: timestamp_bits=30 max_order=15 bucket_order=0
[ 2.670221] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 2.689499] io scheduler noop registered
[ 2.697182] io scheduler deadline registered (default)
[ 2.707369] io scheduler mq-deadline registered
[ 2.716328] io scheduler kyber registered
[ 2.778790] serial8250_init
[ 2.784203] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[ 2.799043] console [ttyS0] disabled
[ 2.806092] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 14, base_baud = 3125000) is a 16550A
[ 2.824120] console [ttyS0] enabled
[ 2.824120] console [ttyS0] enabled
[ 2.837930] bootconsole [early0] disabled
[ 2.837930] bootconsole [early0] disabled
[ 2.854469] Ralink gpio driver initialized
[ 2.864488] MediaTek Nand driver init, version v2.1 Fix AHB virt2phys error
[ 2.878929] spi-mt7621 1e000b00.spi: sys_freq: 220000000
[ 2.890825] m25p80 spi0.0: mx25l12805d (16384 Kbytes)
[ 2.900921] spi0.0: parsing partitions cmdlinepart
[ 2.910465] spi0.0: got parser cmdlinepart
[ 2.918665] 6 fixed-partitions partitions found on MTD device spi0.0
[ 2.931313] Creating 6 MTD partitions on "spi0.0":
[ 2.940858] 0x000000000000-0x000000030000 : "u-boot"
[ 2.951864] 0x000000030000-0x000000034000 : "u-boot-env"
[ 2.963442] 0x000000f30000-0x000000f40000 : "factory"
[ 2.974533] 0x000000050000-0x000000f20000 : "linux"
[ 3.366678] random: crng init done
[ 7.421110] 2 uimage-fw partitions found on MTD device linux
[ 7.432371] Creating 2 MTD partitions on "linux":
[ 7.441744] 0x000000000000-0x0000001f0000 : "kernel"
[ 7.452724] 0x0000001f0000-0x000000ed0000 : "rootfs"
[ 7.463593] mtd: device 5 (rootfs) set to be root filesystem
[ 7.475016] 1 squashfs-split partitions found on MTD device rootfs
[ 7.487339] 0x000000ec0000-0x000000ed0000 : "ddwrt"
[ 7.498084] 0x000000f20000-0x000000f30000 : "nvram"
[ 7.508875] 0x000000000000-0x000001000000 : "fullflash"
[ 7.588481] mtk_soc_eth 1e100000.ethernet: generated random MAC address 96:60:ee:53:c7:6f
[ 9.004624] mtk_soc_eth 1e100000.ethernet: loaded mt7530 driver
[ 9.017148] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 16
[ 9.033983] PPP generic driver version 2.4.2
[ 9.042711] PPP BSD Compression module registered
[ 9.052094] PPP Deflate Compression module registered
[ 9.062168] PPP MPPE Compression module registered
[ 9.071710] NET: Registered protocol family 24
[ 9.081840] GACT probability NOT on
[ 9.088821] Mirror/redirect action on
[ 9.096117] Simple TC action Loaded
[ 9.103845] netem: version 1.3
[ 9.109972] u32 classifier
[ 9.115342] Performance counters on
[ 9.122973] input device check on
[ 9.130258] Actions configured
[ 9.137047] Netfilter messages via NETLINK v0.30.
[ 9.146706] nf_conntrack version 0.5.0 (2048 buckets, 8192 max)
[ 9.159030] nf_conntrack_rtsp v0.7 loading
[ 9.167609] xt_time: kernel timezone is -0000
[ 9.176508] gre: GRE over IPv4 demultiplexor driver
[ 9.186341] nf_nat_rtsp v0.7 loading
[ 9.193485] ip_tables: (C) 2000-2006 Netfilter Core Team
[ 9.204476] NET: Registered protocol family 17
[ 9.213455] Bridge firewalling registered
[ 9.221440] 8021q: 802.1Q VLAN Support v1.8
[ 9.230558] registered taskstats version 1
[ 9.239250] searching for nvram
[ 9.245503] nvram size = 65536
[ 9.476722] nvram empty
[ 9.495077] squashfs: SQUASHFS error: unable to read id index table
[ 9.508001] List of all partitions:
[ 9.514945] 1f00 192 mtdblock0
[ 9.514950] (driver?)
[ 9.527990] 1f01 16 mtdblock1
[ 9.527995] (driver?)
[ 9.541005] 1f02 64 mtdblock2
[ 9.541011] (driver?)
[ 9.554019] 1f03 15168 mtdblock3
[ 9.554024] (driver?)
[ 9.567051] 1f04 1984 mtdblock4
[ 9.567057] (driver?)
[ 9.580065] 1f05 13184 mtdblock5
[ 9.580071] (driver?)
[ 9.593075] 1f06 64 mtdblock6
[ 9.593080] (driver?)
[ 9.606095] 1f07 64 mtdblock7
[ 9.606100] (driver?)
[ 9.619128] 1f08 16384 mtdblock8
[ 9.619134] (driver?)
[ 9.632135] No filesystem could mount root, tried:
[ 9.632140] squashfs
[ 9.641851]
[ 9.649327] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(31,5)
[ 9.665956] Rebooting in 1 seconds..

This just repeats endlessly. The status of the connected ethernet adapter in windows just cycles through "Enabled, Identifying, Network cable unplugged".

I hope this has been useful.

If you have seen my other thread, you may be aware of my observations of the similarity of this device (WNDR3700v5) and the R6220. It appears to me that the two devices are the same PCB. The R6220 has external antennas, and a 128MB NAND flash chip instead of the 16MB NOR chip in this WNDR3700v5. I intend to use this WNDR3700v5 as a project by trying to upgrade its flash so I can install more packages without having to resort to USB storage as I use the single USB port for my LTE modem. For now I will leave it stock so that I can try and report back on any new DD-WRT images that may appear once the developers have understood the logs above. I have not tried DD-WRT on the R6220 so can't say whether or not that image is broken too. That may be something I can help with later.

kernel-panic69
DD-WRT Guru

Joined: 08 May 2018
Posts: 16808
Location: Texas, USA

Posted: Tue Jan 06, 2026 18:35 Post subject:

You will most likely have to try recovering to factory firmware to proceed. That output is from the "bad" DD-WRT firmware version that bootloops? Here's hoping you didn't blow out any of the important partitions by trying to flash from Gargoyle - you always go back to stock first. I've yet to break mine out to test any recent DD-WRT images, but I can forward this to BrainSlayer if you confirm which DD-WRT version factory-to-ddwrt.img you flashed. Thanks.
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se325919
DD-WRT Novice

Joined: 28 Nov 2025
Posts: 19

Posted: Tue Jan 06, 2026 20:03 Post subject:

Yes, to clarify, the log pasted in my previous post was the factory to dd-wrt IMG file from this location:

https://download1.dd-wrt.com/dd-wrtv2/downloads/betas/2025/11-21-2025-r62778/netgear-wndr3700v5/factory-to-ddwrt.img

But to be clear, I used NMRPflash to flash it from the console. Existing on the device prior to that was the 'bad' flash done from the Gargoyle GUI. Are you saying I need to go back to stock even before flashing with NMRPflash? I didn't know that was the case.

I have now flashed the stock Netgear firmware back on it, and it is working, so the vital partitions were definitely not altered. Maybe tomorrow I will try one final flash from the Netgear web GUI just to make sure it still does the boot loop again just to be entirely certain. That is exactly what happened the first time when I first acquired the router though.

kernel-panic69
DD-WRT Guru

Joined: 08 May 2018
Posts: 16808
Location: Texas, USA

Posted: Tue Jan 06, 2026 22:59 Post subject:

No need to do that. It seems there may have been an issue found:

https://svn.dd-wrt.com/changeset/63279

Without going into email contents, I will say that it IS a lack of reporting on these devices and no serial logs that is a problem. It's not your fault, it's not my fault, it's the community-at-large's fault for not raising awareness with proper information for the developer. No telling how long this issue's been going on, but I did track down a few things:

My last report on this device in New Build - 06/12/2025 - r61745

And the only commits that *may* have had influence:

https://svn.dd-wrt.com/changeset/62217/

https://svn.dd-wrt.com/changeset/62235/

So, somewhere between my last report and now, something broke. There's at least one report regarding the R6260 with the webUI issues, so that narrows it down, perhaps:

New Build - 10/13/2025 - r62324

... and I just noticed that build was pulled and wasn't noted in the thread(s) ...

anyhow, I am going to step through on mine to see what was the last build before it broke until we get an alpha to test or public beta.
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se325919
DD-WRT Novice

Joined: 28 Nov 2025
Posts: 19

Posted: Wed Jan 07, 2026 11:46 Post subject:
Well I am happy to have shed some light on that. Hopefully it will lead to a fix that will help everyone else out who may have been in the same situation but didn't know what to do.

se325919
DD-WRT Novice

Joined: 28 Nov 2025
Posts: 19

Posted: Fri Jan 09, 2026 15:11 Post subject:

Explanation of adding external serial header to the WNDR3700v5.

A 4-way female DuPont connector with long wire tails is connected to header J1 on the PCB. These are actually the Power and Reset button wires cut from an old PC case and connectors superglued together side-by-side. The long wires ensure the PCB can still be released from the casing to be worked on in future without the need to de-solder the connections from J1.

Small piece of plastic removed from the perimeter lip of the case's base, and connector superglued down to the plastic with the test points facing upwards.

Pin holes look pretty neat from the outside and will be hidden from view when the router is placed on its vertical stand anyway.

A label outlining the functions of the pins, and the order of the pins is affixed below, to avoid any mishaps.

Individual male DuPont pin connectors (or preferably a single quad pin one) can easily be inserted.

se325919
DD-WRT Novice

Joined: 28 Nov 2025
Posts: 19

Posted: Thu Jan 22, 2026 11:21 Post subject:
Just checking in to see if there is any update or movement on this? Eager to get a working image and try DD-WRT.

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