Further boardflags flags explanation: found

Post new topic   Reply to topic    DD-WRT Forum Forum Index -> General Questions
Author Message
feliciano
DD-WRT Guru


Joined: 24 Oct 2008
Posts: 921
Location: Latin America

PostPosted: Mon Sep 27, 2010 12:43    Post subject: Further boardflags flags explanation: found Reply with quote
Hi all,

According to the hardware wiki, the Boardflags has the following meanings:
Quote:

/* boardflags */

1. define BFL_BTCOEXIST 0x0001 /* This board implements Bluetooth coexistance */
2. define BFL_PACTRL 0x0002 /* This board has gpio 9 controlling the PA */
3. define BFL_AIRLINEMODE 0x0004 /* This board implements gpio13 radio disable indication */
4. define BFL_ENETROBO 0x0010 /* This board has robo switch or core */
5. define BFL_CCKHIPWR 0x0040 /* Can do high-power CCK transmission */
6. define BFL_ENETADM 0x0080 /* This board has ADMtek switch */
7. define BFL_ENETVLAN 0x0100 /* This board has vlan capability */
8. define BFL_AFTERBURNER 0x0200 /* This board supports Afterburner mode */
9. define BFL_NOPCI 0x0400 /* This board leaves PCI floating */
10. define BFL_FEM 0x0800 /* This board supports the Front End Module */
11. define BFL_EXTLNA 0x1000 /* This board has an external LNA */
12. define BFL_HGPA 0x2000 /* This board has a high gain PA */
13. define BFL_BTCMOD 0x4000 /* This board' BTCOEXIST is in the alternate gpios */


That's Ok, but there are three undocumented flags meanings, ie,
0x0008 (0000 0000 0000 1000),
0x0020 (0000 0000 0010 0000),
0x8000 (1000 0000 0000 0000).
Does anyone knows the meaning of those 3 flags?

For instance,
a) when one has a Buffalo HP and boardflags=0x3758, what do the last 8 is telling dd-wrt?

Would be nice to have that in the wiki (and to know it Wink ).

_________________
Worked with: WR850Gv2, WHR-HP-G54, WRT54 G/GL/GS, f5d7231-4p, wl-520gU, WRT150N, DIR-400A1, DIR-600B1, WLI-TX4-G54HP, WHR-HP-GN, F7D3301/FD7301, F7D3302/F7D7302, WNR3500Lv2, e1000


Last edited by feliciano on Sat Oct 09, 2010 7:09; edited 2 times in total
Sponsor
feliciano
DD-WRT Guru


Joined: 24 Oct 2008
Posts: 921
Location: Latin America

PostPosted: Fri Oct 08, 2010 23:39    Post subject: Found Reply with quote
Eko replied me on another thread:

Quote:
Code:

/* boardflags */
#define BFL_BTC2WIRE 0x00000001 /* old 2wire Bluetooth coexistence, OBSOLETE */
#define BFL_BTCOEX 0x00000001 /* Board supports BTCOEX */
#define BFL_BTCOEXIST 0x00000001 /* Board supports BTCOEX */
#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */
#define BFL_AIRLINEMODE 0x00000004 /* Board implements gpio 13 radio disable indication */
#define BFL_ADCDIV 0x00000008 /* Board has the rssi ADC divider */
#define BFL_ENETROBO 0x00000010 /* Board has robo switch or core */
#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */
#define BFL_CCKHIPWR 0x00000040 /* Can do high-power CCK transmission */
#define BFL_ENETADM 0x00000080 /* Board has ADMtek switch */
#define BFL_ENETVLAN 0x00000100 /* Board has VLAN capability */
#ifdef WLAFTERBURNER
#define BFL_AFTERBURNER 0x00000200 /* Board supports Afterburner mode */
#endif /* WLAFTERBURNER */
#define BFL_NOPCI 0x00000400 /* Board leaves PCI floating */
#define BFL_FEM 0x00000800 /* Board supports the Front End Module */
#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */
#define BFL_HGPA 0x00002000 /* Board has a high gain PA */
#define BFL_BTCMOD 0x00004000 /* Board's BTCOEXIST is in the alternate gpios */
#define BFL_BTC2WIRE_ALTGPIO 0x00004000 /* Board's BTC 2wire is in the alternate gpios */
#define BFL_ALTIQ 0x00008000 /* Alternate I/Q settings */
#define BFL_NOPA 0x00010000 /* Board has no PA */
#define BFL_RSSIINV 0x00020000 /* Board's RSSI uses positive slope(not TSSI) */
#define BFL_PAREF 0x00040000 /* Board uses the PARef LDO */
#define BFL_3TSWITCH 0x00080000 /* Board uses a triple throw switch shared with BT */
#define BFL_PHASESHIFT 0x00100000 /* Board can support phase shifter */
#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */
#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */
#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */
#define BFL_CCKFAVOREVM 0x01000000 /* Favor CCK EVM over spectral mask */
#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */
#define BFL_LNLDO2_2P5 0x04000000 /* Select 2.5V as LNLDO2 output voltage */
#define BFL_FASTPWR 0x08000000
#define BFL_UCPWRCTL_MININDX 0x08000000 /* Enforce min power index to avoid FEM damage */
#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */
#define BFL_TRSW_1by2 0x20000000 /* Board has 2 TRSW's in 1by2 designs */
#define BFL_LO_TRSW_R_5GHz 0x40000000 /* In 5G do not throw TRSW to T for clipLO gain */
#define BFL_ELNA_GAINDEF 0x80000000 /* Backoff InitGain based on elna_2g/5g field
* when this flag is set
*/

/* boardflags2 */
#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */
#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */
#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */
#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */
#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */
#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */
#define BFL2_CAESERS_BRD 0x00000040 /* Board is Caesers brd (unused by sw) */
#define BFL2_BTC3WIRE 0x00000080 /* Board support legacy 3 wire or 4 wire */
#define BFL2_BTCLEGACY 0x00000080 /* Board support legacy 3/4 wire, to replace
* BFL2_BTC3WIRE
*/
#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */
#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */
#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */
#define BFL2_TRISTATE_LED 0x00000800 /* Tri-state the LED */
#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */
#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */
#define BFL2_BPHY_ALL_TXCORES 0x00004000 /* Transmit bphy frames using all tx cores */
#define BFL2_FCC_BANDEDGE_WAR 0x00008000 /* Activates WAR to improve FCC bandedge performance */
#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */
#define BFL2_IPALVLSHIFT_3P3 0x00020000
#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */
#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio "ON"
* Most drivers will turn it off without this flag
* to save power.
*/
#define BFL2_ANAPACTRL_2G 0x00100000 /* 2G ext PAs are controlled by analog PA ctrl lines */
#define BFL2_ANAPACTRL_5G 0x00200000 /* 5G ext PAs are controlled by analog PA ctrl lines */
#define BFL2_ELNACTRL_TRSW_2G 0x00400000 /* AZW4329: 2G gmode_elna_gain controls TR Switch */
#define BFL2_BT_SHARE_ANT0 0x00800000 /* share core0 antenna with BT */
#define BFL2_TEMPSENSE_HIGHER 0x01000000 /* The tempsense threshold can sustain higher value
* than programmed. The exact delta is decided by
* driver per chip/boardtype. This can be used
* when tempsense qualification happens after shipment
*/
#define BFL2_BTC3WIREONLY 0x02000000 /* standard 3 wire btc only. 4 wire not supported */

_________________
Worked with: WR850Gv2, WHR-HP-G54, WRT54 G/GL/GS, f5d7231-4p, wl-520gU, WRT150N, DIR-400A1, DIR-600B1, WLI-TX4-G54HP, WHR-HP-GN, F7D3301/FD7301, F7D3302/F7D7302, WNR3500Lv2, e1000
GeeTek
DD-WRT Guru


Joined: 06 Jun 2006
Posts: 3768
Location: I'm the one on the plate.

PostPosted: Sat Oct 09, 2010 2:23    Post subject: Reply with quote
Get a grip. Yer trippin' Confused
Display posts from previous:    Page 1 of 1
Post new topic   Reply to topic    DD-WRT Forum Forum Index -> General Questions All times are GMT

Navigation

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum
You can attach files in this forum
You can download files in this forum